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Production process of AMD’s Zen 5 and Zen 6 architectures revealed

An AMD engineer's LinkedIn profile has revealed the codename and process process for AMD's Zen 5 and Zen 6 processors. Md Zaheer is a veteran silicon design engineer working on the power management of Zen 4, Zen 5 and Zen 6 processors.
 Production process of AMD’s Zen 5 and Zen 6 architectures revealed
READING NOW Production process of AMD’s Zen 5 and Zen 6 architectures revealed
An AMD engineer’s LinkedIn profile has revealed the codename and process process for AMD’s Zen 5 and Zen 6 processors. It is known that the engineer named Md Zaheer is a senior silicon design engineer working on the power management of Zen 4, Zen 5 and Zen 6 processors. In addition, Zen 5 processors are planned for the first half of 2024, while Zen 6 processors are planned for the second half of 2025.

New insights from Zen 5 and Zen 6

AMD had already officially confirmed the Zen 5 architecture months ago. Therefore, the information revealed for Zen 5 is important, although not a surprise. In this context, it is reported that Zen 5 processors will be shaped in bands in the 3nm production process and will use the code name Nirvana. It is seen that Zen 6 processors will be produced in the 2 nm process and will have the code name Morpheus.

Another important point of the emerging information is that it applies to server-side EPYC processors. Previous information It was said that Ryzen-based Zen 5 processors will come in the 4nm process. For this reason, we can see both 4nm and 3nm processors in Zen 5, although they are not in the same product item.

In the news we made the other day, we conveyed the performance results of a Zen 5 based EPYC processor. When we accept the information correctly, we can say that the Zen 5 architecture will come with very serious performance gains. AMD’s official Zen 5 statements actually point to this. The firm will launch consumer-grade Zen 5-based Ryzen processors in the first half of 2024. Zen 5 CPUs will come in three flavors (Zen 5/Zen 5 V-Cache/Zen 5C), and the chip itself will be designed from the ground up. Alongside integrated AI and machine learning optimization, enhanced performance, efficiency and an entirely new microarchitecture will be the focus of the family.

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