New chip packaging technology can reduce power consumption of Exynos 2400

Samsung will reportedly begin using a new chip packaging technology to provide better chip performance and lower power consumption.

According to EDaily from South Korea, Samsung started to use FOWL (Fan-Out Wafer Level Packaging) technology for chip production and deliver products produced with this technology to its customers.

It is stated that FOWLP is an important technology to increase performance in semiconductor production. It is a known fact that Samsung is technologically behind TSMC in chip production. However, with this technology, Samsung can close the gap. It is known that TSMC also uses a similar technology.

Provides space, cost and performance gains

Thanks to FOWLP chip packaging technology, the thickness of the chip decreases, saving both time and cost. While the chips are being packaged, they are added to the PCB (Printed Circuit Board) and stacked. With FOWLP technology, the need for a PCB is eliminated as the chips are directly connected to the wafer. FOWLP allows 40% smaller size, 30% lower thickness and 15% higher performance than the currently used FC-BGA (Flip Chip-Ball Grid Array) packaging. This technology is currently used in the production of GDDR6W chips.

Samsung is expected to use FOWLP technology in the production of Exynos 2400. In this way, power consumption, which is the weak point of Exynos chips, can be improved. Exynos 2400 is produced with Samsung’s second generation 4nm (4LPP) manufacturing process. The processor will power the Galaxy S24 and Galaxy S24+ models that will be sold in many countries. We are curious to see how the chipset will perform compared to previous Exynos.