Intel, which has struggled to fulfill its chip production promises for years, will present important technologies at the VLSI Symposium to be held next week, according to a recent press release. Intel will share advances in PowerVia chip manufacturing technology, an application for backside power delivery (BPD) networks it is developing. With PowerVia, Intel states that it is two years ahead of its competitors. Processors using this technology will be released in 2024.

PowerVia will be crucial for producing smaller, less power-hungry chips that are part of Intel’s roadmap announced in 2021. With PowerVia, Intel will move all the energy elements within the chip to the background of the chip. Thus, the firm will deliver the energy directly to the components that need it, rather than diverting it to the side and an “increasingly chaotic web.” The advantage of this new method is that the power and signal lines have more area and can therefore be larger and more conductive.

Intel says the new solution has proven successful with a test chip called Blue Sky Creek, the efficiency core (E-Core) found in the upcoming Meteor Lake PC processor. It is stated that the new method allows both better power distribution and better signaling.

PowerVia is crucial to Intel

PowerVia technology will not come alone. Coming with Intel’s RibbonFET technology for GAA transistors, PowerVia will combine two major chip technologies that Intel believes are necessary to return to fabrication leadership.

Together, these two technologies will form the backbone of Intel’s angstrom-era fabrication nodes that will go into high-volume production next year, making Intel’s advancement in new technologies an issue of great importance both inside and outside the company.

To this end, Intel will reveal a lot of information about the BPD network technology, which it calls PowerVia, at the symposium to be held next week. At the heart of these documents is Blue Sky Creek, a “product-like” test chip implemented with PowerVia on Intel 4 process technology with EUV. A 90 percent increase in cell density was achieved in this test chip. Intel also said the test showed more than 30 percent platform voltage drop improvement and 6 percent frequency advantage factors, which should help with performance and power efficiency. Suffice it to say that Intel’s VLSI conference this year is a huge moment for the company.

On the other hand, BPD (BSP/BS-PDN) is a technology concept that has been quietly being developed in the entire chip factory industry for the past few years. Similar to EUV in new manufacturing processes, BPD is seen as a necessary technology to continue to develop increasingly smaller process technology, and as a result, all leading chip manufacturers are expected to switch to this technology in the future.

Intel: We are two years ahead of the competition

However, not all manufacturers will switch to this technology at the same time, of course. Intel expects to be the first company among the three major chip factories to product technology by bringing technology to chips at least two years ahead of its competitors. Ultimately, Intel is at the forefront of this technology, and that comes with risks – but there are significant rewards to getting the technology (and timing) right. For Intel, the company believes this will be the “new FinFET moment.” Considering that TSMC and Samsung will switch to this at the same time as Intel when it comes to GAAFET, we can say that PowerVia will be Intel’s trump card in the fabrication area for the next few years.

As a result, Intel, together with PowerVia, aims to reach a much smaller and more efficient 3nm, 4nm and even the upcoming 2nm processes that we use frequently today. Along with the transistors, other energy elements in the chip will also be scaled. This technology will not only bring performance and efficiency. It will also benefit the complexity of the designs. For the average computer user, that means more efficient and faster chips. This is also an indication that Moore’s Law will be with us for a while.