The European Space Agency (ESA) announced that they will bring together researchers at the University of Bologna and ETH Zurich to develop a RISC-V processor with a new chiplet design. In an announcement made during a conference, the project group called Parallel Ultra Low Power Platform (PULP) developed an open source RISC-V silicon artificial intelligence chip called Occamy. Occamy will be able to perform high-performance operations, increasing efficiency while reducing the time previously required to perform these calculations.432 core RISC-V processor with chip design
Occamy’s design has been in development since April 20, 2021. The developed chip has about 1 billion transistors in an area of 72mm^2, similar to the Sandy Bridge quad-core chip designed by Intel in 2011. The Occamy initiative is part of the EuPilot program, which develops custom CPUs to reduce the need to buy chips from ARM and other x86 chipmakers. What is unique about this project is the use of new and old technology in the design of Occamy.In the memory section of Occamy, there is dual 16 GB HBM2E DRAM developed by Micron and 2.5D integration is used. Additionally, a compact 32-bit RISC-V control chip on the chip maps the data and routes the information to the AI cores in the Occamy chip. In this way, it is planned to make calculations faster.
The design of the RISC-V “Occamy” CPU is built on the low power 12nm GlobalFoundry “GF12LPP” process and then placed on a 65nm passive interposer. Occamy uses a RISC-V ISA with up to 216 32-bit cores on two chipsets, while the total number of cores available is 432. The performance of the Occamy chip can reach 0.768 TFLOPs in FP64, 1,536 TFLOPs in FP32, 3,072 TFLOPs in FP16 and 6,144 TFLOPs in FP8 precision. More information about the Occamy RISC-V chip is expected to be announced later in the year.
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