Google recently launched the new Pixel 8 and Pixel 8 Pro with the new Tensor G3 chipset. Of course, this new chip was expected to be better than the previous Tensor G2. However, Google’s voluntary restriction of this processor surprised everyone.
Google reduced the peak frequency of the Tensor G3 processor!
Recent Tensor G3 feature leaks said that Google would switch to a new CPU block and a new core layout with higher peak frequencies. But the last Tensor G3 shipped by Google came with much lower frequencies. As far as we understand, there has been a change of plans. As a matter of fact, the source code of Pixel 8 shows the same thing.
Although Google initially planned to use a much higher peak frequency on the Tensor G3, it now clearly appears that it has switched to the lower values found on Pixel 8 phones. In fact, in the source code of the Pixel 8 Pro, we can see a series of coding that lowers the frequencies for all cores.
Here are the reported frequencies from the Tensor G3 on the Pixel 8 Pro (For reference, comparison chart between current peak frequencies and leaked specs):
| Tensor G3 | True Peak Frequency | Leaked Peak Frequency |
|---|---|---|
| 1x Arm Cortex-X3 | 2.91GHz | 3.0GHz |
| 4x Arm Cortex-A715 | 2.37GHz | 2.45GHz |
| 4x Arm Cortex-A510 | 1.70GHz | 2.15GHz |
It is thought that reducing these CPU frequencies may be due to various reasons. It may be that Google never wants higher frequencies to be used, or the higher frequencies may not have been stable or created other problems.
As mentioned in previous Tensor G3 benchmark tests, the Tensor G3 seems to focus on power efficiency rather than raw performance. Those looking for consistently fast performance may not be happy with the Pixel 8 series, and it’s not a phone suitable for long-term stress tests. However, the positive side to this is; Battery life of the Pixel 8 series performs much better in web and video playback tests.
Finally, attentive readers may have noticed in the screenshot above that the Tensor G3 is stated to have a 5nm manufacturing architecture, although this is generally considered a 4nm chipset. Because CPU information applications may have data entry errors and may not always provide correct information.
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