TSMC has trouble with its 3nm process

TSMC, which has made significant investments for the 3nm production process and has been working for a long time, cannot achieve the efficiency levels it expects. Developments are critical for chip giants.
 TSMC has trouble with its 3nm process
READING NOW TSMC has trouble with its 3nm process

Taiwanese TSMC, which is the undisputed leader of the casting industry, is constantly developing its technologies in order not to make room for competition. Having the most efficient production lines in the 5nm process, TSMC, however, is experiencing difficulties in the 3nm process.

TSMC is in trouble

According to information from the industry, TSMC is experiencing efficiency problems in the 3nm production process group. The original N3, the more optimized N3E, and the cost-oriented N3B manufacturing processes still haven’t achieved the expected chip efficiency. TSMC is trying to increase efficiency by trying different solutions.

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Problems in the 3nm process negatively affect customers’ roadmap. Chip giants such as Intel, Apple, AMD, Nvidia poured tons of money to separate their 3nm lines. Failure to achieve chip efficiency may result in delays.

AMD’s Zen 5 and RDNA 4 architectures are expected to be developed in the 3nm process. After the Apple A17, it plans to switch to the 3nm process normally. Nvidia also wants to evolve towards the 3nm process after Lovelace. At least one or two generations of 3nm production processes may be delayed due to efficiency issues, as Samsung has the same problems.

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