Nvidia Hopper architecture comes with over 140 billion transistor counts

As NVIDIA’s “Lovalece” GPU architecture that will power next-generation graphics cards such as RTX 4090 and GeForce RTX 4080 approaches, new details about the “Hopper” architecture targeting data centers have emerged.

Competition between Intel, AMD and Nvidia will heat up

According to the new information shared, the Hopper architecture, which is claimed to have more than 140 billion transistors, will also be among the largest chips ever made. In addition, the new architecture, which will offer an almost 3-fold increase in the number of transistors compared to the Ampere series, will host 900 mm² total membrane area size and HBM2 memories.

Lovelace and Hopper architectures, which are expected to transition to 5 nm compared to the current Ampere architecture produced with 7 nm process technology, will provide greater power efficiency and greater improvements in performance with this development in production technology. In addition, on the server side, Hopper architecture, which will compete with AMD’s Aldebaran and Intel’s Ponte Vecchio graphics cards, is expected to come with a multi-chip design.