Intel adopts AMD’s 3D V-Cache technology

Intel CEO Pat Gelsinger held a Q&A session with the press at Innovation 2023. Responding to a question about whether Intel will adopt a 3D cache approach like AMD has done with its 3D V-Cache processors, Gelsinger confirmed that Intel will take a slightly different approach but use stacked cache mapped to the CPU die.

AMD became a role model for Intel

Let’s state from the beginning that stacked cache or 3D V-Cache technology will not come with Meteor Lake processors. Intel will start using this method in its later processors. Intel will also offer its stacked cache technology to customers. On the other hand, it makes sense for Intel to embrace this type of technology; While the hybrid packaging technology behind 3D V-Cache is not exclusive to AMD, it is provided by TSMC’s SoIC packaging technology.

But Intel will take a different path, as Gelsinger said: “But in our roadmap, you’ll see this idea of ​​3D silicon where we’ll have cache on a single die, right? “And then we’ll add the CPU unit on top of that in a stacked die” This seems different from AMD’s use of chip stacking technology to place additional memory on top of CPU dies. According to Gelsinger, Intel wants to do the opposite and stack the CPU on top of the memory.

Stacked cache has proven to be a strategic advantage for AMD as it powers the company’s Ryzen X3D CPUs, the world’s fastest gaming processors. It is also positioned as a strong added value for X series EPYC processors such as Genoa-X. It seems that Intel will also step into the ring with this technology in the future. Intel’s EMIB and Foveros technologies will have a big hand here. While Intel’s CEO didn’t go into much detail, he did say that the company plans to vertically connect chip dies using EMIB and Foveros processes, allowing silicon to communicate together in a single package. The first step of these is actually taken with Core Ultra processors codenamed Meteor Lake.